/**
 * 							Interrupt SRC Defination
 * @brief	interrrupt src define
 * @author	chy.
 * @note
 * @comment
 */
#ifndef _K_INT_S3C2440A_H_
#define _K_INT_S3C2440A_H_

#include "k_io_basedefine.h"

/* interrtup source table */
/*
*	comments	from s3c2440a
*
	 INT_ADC    ADC EOC and Touch interrupt (INT_ADC_S/INT_TC) ARB5
     INT_RTC    RTC alarm interrupt                            ARB5
     INT_SPI1   SPI1 interrupt                                 ARB5
   INT_UART0    UART0 Interrupt (ERR, RXD, and TXD)            ARB5
	INT_IIC     IIC interrupt                                  ARB4
    INT_USBH    USB Host interrupt                             ARB4
    INT_USBD    USB Device interrupt                           ARB4
  INT_NFCON     Nand Flash Control Interrupt                   ARB4
   INT_UART1    UART1 Interrupt (ERR, RXD, and TXD)            ARB4
     INT_SPI0   SPI0 interrupt                                 ARB4
       INT_SDI  SDI interrupt                                  ARB3
    INT_DMA3    DMA channel 3 interrupt                        ARB3
    INT_DMA2    DMA channel 2 interrupt                        ARB3
    INT_DMA1    DMA channel 1 interrupt                        ARB3
    INT_DMA0    DMA channel 0 interrupt                        ARB3
      INT_LCD   LCD interrupt (INT_FrSyn and INT_FiCnt)        ARB3
   INT_UART2	Interrupt (ERR, RXD, and TXD) UART2            ARB2
  INT_TIMER4    Timer4 interrupt                               ARB2
  INT_TIMER3    Timer3 interrupt                               ARB2
  INT_TIMER2    Timer2 interrupt                               ARB2
  INT_TIMER1    Timer1 interrupt                               ARB2
  INT_TIMER0    Timer0 interrupt                               ARB2
INT_WDT_AC97    Watch-Dog timer interrupt(INT_WDT, INT_AC97)   ARB1
     INT_TICK   RTC Time tick interrupt                        ARB1
   nBATT_FLT    Battery Fault interrupt                        ARB1
     INT_CAM    Camera Interface (INT_CAM_C, INT_CAM_P)        ARB1
     EINT8_23   External interrupt 8 – 23                      ARB1
      EINT4_7   External interrupt 4 – 7                       ARB1
         EINT3  External interrupt 3                           ARB0
         EINT2  External interrupt 2                           ARB0
         EINT1  External interrupt 1                           ARB0
         EINT0  External interrupt 0                           ARB0
子中断源
     子源                                  描述                                      源
INT_AC97       AC97 interrupt                                            INT_WDT_AC97
INT_WDT        Watchdog interrupt                                        INT_WDT_AC97
INT_CAM_P      P-port capture interrupt in camera interface              INT_CAM
INT_CAM_C      C-port capture interrupt in camera interface              INT_CAM
INT_ADC_S      ADC interrupt                                             INT_ADC
INT_TC         Touch screen interrupt (pen up/down)                      INT_ADC
INT_ERR2       UART2 error interrupt                                     INT_UART2
INT_TXD2       UART2 transmit interrupt                                  INT_UART2
INT_RXD2       UART2 receive interrupt                                   INT_UART2
INT_ERR1       UART1 error interrupt                                     INT_UART1
INT_TXD1       UART1 transmit interrupt                                  INT_UART1
INT_RXD1       UART1 receive interrupt                                   INT_UART1
INT_ERR0       UART0 error interrupt                                     INT_UART0
INT_TXD0       UART0 transmit interrupt                                  INT_UART0
INT_RXD0       UART0 receive interrupt                                   INT_UART0
*/

/**
 * define the interrupt offset value, we can read this register to determind which
 * interrupt has occured fastly in c3s2440a
 */
#define   	INT_ADC_OFFT    		31
#define   	INT_RTC_OFFT    		30
#define   	INT_SPI1_OFFT   		29
#define		INT_UART0_OFFT			28
#define     INT_IIC_OFFT  			27
#define  	INT_USBH_OFFT	    	26
#define  	INT_USBD_OFFT	    	25
#define 	INT_NFCON_OFFT		   	24
#define 	INT_UART1_OFFT 			23
#define   	INT_SPI0_OFFT 			22
#define    	INT_SDI_OFFT			21
#define 	INT_DMA3_OFFT			20
#define  	INT_DMA2_OFFT			19
#define  	INT_DMA1_OFFT			18
#define  	INT_DMA0_OFFT			17
#define   	INT_LCD_OFFT			16
#define   	INT_UART2_OFFT			15
#define  	INT_TIMER4_OFFT			14
#define  	INT_TIMER3_OFFT			13
#define  	INT_TIMER2_OFFT			12
#define 	INT_TIMER1_OFFT			11
#define 	INT_TIMER0_OFFT			10
#define 	INT_WDT_AC97_OFFT		9
#define		INT_TICK_OFFT			8
#define		nBATT_FLT_OFFT			7
#define		INT_CAM_OFFT			6
#define		EINT8_23_OFFT			5
#define     EINT4_7_OFFT			4
#define     EINT3_OFFT				3
#define     EINT2_OFFT				2
#define     EINT1_OFFT				1
#define     EINT0_OFFT	 			0

/**
 * define mask and clear value of rigister operation,
 * bit value set 1 means mask or clean depending on different registers
 * (CLI means clean Interrupt flat bit)
 */
#define	 INT_ADC_MSK_AND_CIF		0x80000000
#define  INT_RTC_MSK_AND_CIF		0x40000000
#define  INT_SPI1_MSK_AND_CIF		0x20000000
#define  INT_UART0_MSK_AND_CIF		0x10000000
#define	 INT_IIC_MSK_AND_CIF		0x8000000
#define  INT_USBH_MSK_AND_CIF		0x4000000
#define  INT_USBD_MSK_AND_CIF		0x2000000
#define  INT_NFCON_MSK_AND_CIF		0x1000000
#define  INT_UART1_MSK_AND_CIF		0x800000
#define  INT_SPI0_MSK_AND_CIF		0x400000
#define  INT_SDI_MSK_AND_CIF		0x200000
#define  INT_DMA3_MSK_AND_CIF		0x100000
#define  INT_DMA2_MSK_AND_CIF		0x80000
#define  INT_DMA1_MSK_AND_CIF		0x40000
#define  INT_DMA0_MSK_AND_CIF		0x20000
#define  INT_LCD_MSK_AND_CIF		0x10000
#define  INT_UART2_MSK_AND_CIF		0x8000
#define  INT_TIMER4_MSK_AND_CIF		0x4000
#define  INT_TIMER3_MSK_AND_CIF		0x2000
#define  INT_TIMER2_MSK_AND_CIF		0x1000
#define  INT_TIMER1_MSK_AND_CIF		0x800
#define  INT_TIMER0_MSK_AND_CIF		0x400
#define  INT_WDT_AC97_MSK_AND_CIF	0x200
#define  INT_TICK_MSK_AND_CIF		0x100
#define  nBATT_FLT_MSK_AND_CIF		0x80
#define  INT_CAM_MSK_AND_CIF		0x40
#define  EINT8_23_MSK_AND_CIF		0x20
#define  EINT4_7_MSK_AND_CIF		0x10
#define  EINT3_MSK_AND_CIF			0x8
#define  EINT2_MSK_AND_CIF			0x4
#define  EINT1_MSK_AND_CIF			0x2
#define  EINT0_MSK_AND_CIF			0x1

// sub interrupt
#define	INT_RXD0_MSK_AND_CIF_SUB	0x1
#define	INT_TXD0_MSK_AND_CIF_SUB	0x2
#define	INT_ERR0_MSK_AND_CIF_SUB	0x4
#define	INT_RXD1_MSK_AND_CIF_SUB	0x8
#define	INT_TXD1_MSK_AND_CIF_SUB	0x10
#define	INT_ERR1_MSK_AND_CIF_SUB	0x20
#define	INT_RXD2_MSK_AND_CIF_SUB	0x40
#define	INT_TXD2_MSK_AND_CIF_SUB	0x80
#define	INT_ERR2_MSK_AND_CIF_SUB	0x100
#define	INT_TC_MSK_AND_CIF_SUB		0x200
#define	INT_ADC_S_MSK_AND_CIF_SUB	0x400
#define	INT_CAM_C_MSK_AND_CIF_SUB	0x800
#define	INT_CAM_P_MSK_AND_CIF_SUB	0x1000
#define	INT_WDT_MSK_AND_CIF_SUB		0x2000
#define	INT_AC97_MSK_AND_CIF_SUB	0x4000

// interrupt type defination
typedef enum
{
	INT_ADC = 0,	// ADC EOC and Touch interrupt (INT_ADC_S/INT_TC) ARB5
    INT_RTC,   		// RTC alarm interrupt                            ARB5
    INT_SPI1,  		// SPI1 interrupt                                 ARB5
    INT_UART0,   	// UART0 Interrupt (ERR, RXD, and TXD)            ARB5
	INT_IIC,   		// IIC interrupt                                  ARB4
    INT_USBH,  		// USB Host interrupt                             ARB4
    INT_USBD,  		// USB Device interrupt                           ARB4
    INT_NFCON,   	// Nand Flash Control Interrupt                   ARB4
    INT_UART1, 		// UART1 Interrupt (ERR, RXD, and TXD)            ARB4
	INT_SPI0,		// SPI0 interrupt                                 ARB4
	INT_SDI,		// SDI interrupt                                  ARB3
    INT_DMA3,  		// DMA channel 3 interrupt                        ARB3
    INT_DMA2,  		// DMA channel 2 interrupt                        ARB3
    INT_DMA1,  		// DMA channel 1 interrupt                        ARB3
    INT_DMA0,  		// DMA channel 0 interrupt                        ARB3
	INT_LCD,		// LCD interrupt (INT_FrSyn and INT_FiCnt)        ARB3
    INT_UART2,   	// Interrupt (ERR, RXD, and TXD) UART2            ARB2
	INT_TIMER4,   	// Timer4 interrupt                               ARB2
	INT_TIMER3,  	// Timer3 interrupt                               ARB2
	INT_TIMER2,  	// Timer2 interrupt                               ARB2
	INT_TIMER1,  	// Timer1 interrupt                               ARB2
	INT_TIMER0,  	// Timer0 interrupt                               ARB2
	INT_WDT_AC97,  	// Watch-Dog timer interrupt(INT_WDT, INT_AC97)   ARB1
	INT_TICK, 		// RTC Time tick interrupt                        ARB1
    nBATT_FLT,   	// Battery Fault interrupt                        ARB1
	INT_CAM,		// Camera Interface (INT_CAM_C, INT_CAM_P)        ARB1
	EINT8_23,  		// External interrupt 8 – 23                      ARB1
    EINT4_7,		// External interrupt 4 – 7                       ARB1
    EINT3,			// External interrupt 3                           ARB0
    EINT2,			// External interrupt 2                           ARB0
    EINT1,			// External interrupt 1                           ARB0
    EINT0,			// External interrupt 0                           ARB0
	INT_AC97,      	// AC97 interrupt                                 INT_WDT_AC97
	INT_WDT,     	// Watchdog interrupt                             INT_WDT_AC97
	INT_CAM_P,     	// P-port capture interrupt in camera interface   INT_CAM
	INT_CAM_C,    	// C-port capture interrupt in camera interface   INT_CAM
	INT_ADC_S,    	// ADC interrupt                                  INT_ADC
	INT_TC,       	// Touch screen interrupt (pen up/down)           INT_ADC
	INT_ERR2,      	// UART2 error interrupt                          INT_UART2
	INT_TXD2,    	// UART2 transmit interrupt                       INT_UART2
	INT_RXD2,     	// UART2 receive interrupt                        INT_UART2
	INT_ERR1,     	// UART1 error interrupt                          INT_UART1
	INT_TXD1,     	// UART1 transmit interrupt                       INT_UART1
	INT_RXD1,     	// UART1 receive interrupt                        INT_UART1
	INT_ERR0,     	// UART0 error interrupt                          INT_UART0
	INT_TXD0,     	// UART0 transmit interrupt                       INT_UART0
	INT_RXD0     	// UART0 receive interrupt                        INT_UART0
}K_INT_type;

/*************************************************************************************
 * 								Macros Define for Mapping I/O address
 * 					the follows Macros are different with any platform
 *************************************************************************************/
/** SOURCE PENDING REGISTER (SRCPND) */
#define	INT_PORT_SRCPND		K_IO_PHYPORT2VIRPORT(0x4a000000)
#define	INT_PORT_INTMOD		K_IO_PHYPORT2VIRPORT(0x4a000004)
#define	INT_PORT_INTMSK		K_IO_PHYPORT2VIRPORT(0X4A000008)
#define INT_PORT_PRIORITY	K_IO_PHYPORT2VIRPORT(0x4A00000C)
#define	INT_PORT_INTPND		K_IO_PHYPORT2VIRPORT(0X4a000010)
#define	INT_PORT_INTOFFSET	K_IO_PHYPORT2VIRPORT(0x4a000014)
#define	INT_PORT_SUBSRCPND	K_IO_PHYPORT2VIRPORT(0x4a000018)
#define INT_PORT_INTSUBMSK	K_IO_PHYPORT2VIRPORT(0X4A00001C)

#define	INT_CLEAN_SRCPND_INT(__val__) (*(unsigned int *)INT_PORT_SRCPND = __val__)
#define	INT_CLEAN_INTPND_INT(__val__) (*(unsigned int *)INT_PORT_INTPND = __val__)
#define	INT_CLEAN_SUBSRCPND_INT(__val__) (*(unsigned int *)INT_PORT_SUBSRCPND = __val__)

/**
/*************************************************************************************
 * 								Interrupt Controlors
 * 			the follows functions are different with any platform
 *************************************************************************************/

/**
 * @BRIEF	:	Enable Specifac Interrupt
 * @PARAM	:	int_type	Interrtup type
 * @RETURN	:	void
 * @NOTE	:	if this is a sub interrupt, then return the sub interrupt type.
 * 			:	This function will automatically clean the interrupt flag
 */
void k_int_irq_enable_type(unsigned int type);


/**
 * @BRIEF	:	Disable Specifac Interrupt
 * @PARAM	:	int_type	Interrtup type
 * @RETURN	:	void
 */
void k_int_irq_diable_type(unsigned int type);

/**
 * @BRIEF	:	Clean Specifac Interrupt
 * @PARAM	:	int_type	Interrtup type
 * @RETURN	:	void
 */
void k_int_irq_clean(unsigned int type);

/**
 * @BRIEF	:	Get current interrupt type
 * @PARAM	:	void
 * @RETURN	:	int_type	Interrtup type
 * @NOTE	:	this function will automatically clear the interrupt flag bits (including sub interrupt)!
 */
unsigned int k_int_get_cur_irq_type(void);

/**
 * @BRIEF	:	Set Interrupt Priority
 * @PARAM	:	priority value
 * @RETURN	:	void
 * @NOTE	:	This function just write the value to the correspounding rigister
 */
void k_init_set_irq_priority(unsigned int priority);

#endif /* _K_INT_S3C2440A_H_ */